FPGA Engineer VHDL & DSP (Freelance) – renewal of existing product
Details
- Status:
- Gepubliceerd
- Publicatiedatum:
- 4-11-2026
- Weergaven:
- 71
- Reacties:
- 3
- Op locatie:
- Hoogeveen
- FTE:
- 16 - 40 uur per week
Opdrachtomschrijving
The assignment
We are renewing the hardware of an existing product within our mission-critical communication portfolio. Part of this renewal is the FPGA design and digital signal processing. The current implementation is proven in the field and serves as the starting point; your assignment is to redesign and modernise it into a well-verified,...
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