For development of the Sphericam, we need a JPG encoder running on the FPGA of a Zynq 7010 processor, to be written in VHDL. It is to be implemented on a Sphericam (360 camera) to compress at least 30 fps 4k images into an MJPEG stream.
We offer 9000E for who develops this for us within 2 weeks of time. It has to run in a live camera a.s.a.p.
Very cool and nice challenge. If only i had my hands free.....
I noticed there is plenty of VHDL jpeg material out there. Have there been already done some attempts?? I never worked with the zynq 7010 so i don't know if existing jpeg VHDL libs would fit in? One quick google gave me a hybrid solution use vhdl as a piped accelarator and still use a bit of software on the ARM to assist/manage the process. Is there also availablilty of resources of the ARM CPU to be dedicated for this process?
Anyway succes with finding someone to do it in that timeframe. If the deadline could be later i might be able to give it a go ;). Years ago i have been working on developing a camera using a FPGA for CMOS control and a bit of data processing. I did that in 2 different projects and it would be so cool to be able to take up that knowledge again.
Met vriendelijke groet,
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